DisplayPort

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DisplayPort



Highlights


Compact IP size and easy for integration
Ultra low power consumption for DisplayPort v1.2
Extensive testability including loopback mode



Features


Fully compliant to DisplayPort specification version 1, revision 2a
Includes 2 Lanes DisplayPort Transmitter
Includes AUX Channel transceiver
Supports data rate of 5.4/2.7/1.62 Gbps per lane
Supports logic circuit for PMA-only PHY control (without protocol)
Supports 10/12/25/27 MHz clock input source for High-speed multi-rate PLL
Supports post-cursor 1 FFE for Main Link transmitter
Supports 0.8 V TX output swing for Main Link transmitter
Supports 20-bit databus width of parallel interface
Supports PLL-alive mode
Supports built-in internal loopback mode for testing


© 2021 | M SQUARE Ltd. Shanghai | All Rights Reserved | 上海奎芯集成电路设计有限公司


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DisplayPort
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marcom@m2ipm2.com

hr@m2ipm2.com

上海市闵行区申长路519号6-2楼6楼

Copyright @ 上海奎芯集成电路设计有限公司  All Rights Reserved  沪ICP备2021035876号  沪公网安备 31011202014381号

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